JPH0334655B2 - - Google Patents
Info
- Publication number
- JPH0334655B2 JPH0334655B2 JP56143798A JP14379881A JPH0334655B2 JP H0334655 B2 JPH0334655 B2 JP H0334655B2 JP 56143798 A JP56143798 A JP 56143798A JP 14379881 A JP14379881 A JP 14379881A JP H0334655 B2 JPH0334655 B2 JP H0334655B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- mask
- recess
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Drying Of Semiconductors (AREA)
- Element Separation (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14379881A JPS5846647A (ja) | 1981-09-14 | 1981-09-14 | 半導体装置の製造方法 |
US06/384,648 US4472874A (en) | 1981-06-10 | 1982-06-03 | Method of forming planar isolation regions having field inversion regions |
DE8282105074T DE3279916D1 (en) | 1981-06-10 | 1982-06-09 | Method of manufacturing integrated circuit devices using dielectric isolation |
EP82105074A EP0067419B1 (en) | 1981-06-10 | 1982-06-09 | Method of manufacturing integrated circuit devices using dielectric isolation |
CA000404883A CA1191280A (en) | 1981-06-10 | 1982-06-10 | Method of forming plunar isolation regions having field inversion regions |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14379881A JPS5846647A (ja) | 1981-09-14 | 1981-09-14 | 半導体装置の製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20127490A Division JPH0738409B2 (ja) | 1990-07-31 | 1990-07-31 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5846647A JPS5846647A (ja) | 1983-03-18 |
JPH0334655B2 true JPH0334655B2 (en]) | 1991-05-23 |
Family
ID=15347222
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14379881A Granted JPS5846647A (ja) | 1981-06-10 | 1981-09-14 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5846647A (en]) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01125935A (ja) * | 1987-11-11 | 1989-05-18 | Seiko Instr & Electron Ltd | 半導体装置の製造方法 |
US5387540A (en) * | 1993-09-30 | 1995-02-07 | Motorola Inc. | Method of forming trench isolation structure in an integrated circuit |
JP4746262B2 (ja) * | 2003-09-17 | 2011-08-10 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5423230A (en) * | 1977-07-22 | 1979-02-21 | Mitsubishi Rayon Eng Kk | Controlling system of sulfur oxide discharge amount contained in the combustion gas |
-
1981
- 1981-09-14 JP JP14379881A patent/JPS5846647A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5846647A (ja) | 1983-03-18 |
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